Pipelining

Pipelining is a technique used in CPU design to improve the performance of instruction execution.

It allows multiple instructions to be processed at different stages of the fetch–decode–execute cycle simultaneously.

By dividing the instruction processing into stages and processing them in parallel, pipelining can significantly reduce the time it takes to complete a sequence of instructions.

This process is often compared to an assembly line, where each stage of instruction processing is completed independently and in parallel with other stages, to create more goods in a shorter amount of time.

To implement pipelining, a computer would take the fetch–decode–execute cycles of several instructions and divide them into further, smaller steps (an example is shown on the next slide.) A step from one instruction could be done at the same time as a step of another instruction: one CPU core can fetch an instruction $X$, decode an instruction $Y$, and execute an instruction $Z$ all at the same time!