Paging

3. [Best solution:] Use a very special high-speed memory device called the translation look-aside buffer (TLB) to store a part of the page table.
   • This cache-like device is very fast and doesn't incure performance penalty.
   • The TLB must be kept small in size (typically from 32 to 1024 entries).
   • This means that the TLB can store only a part of the entries of the page table at a time.
   The usage of the TLB goes as follows: whenever the CPU is looking up an address, it will first look into the TLB first to check if the page entry is in there.
   • If yes, the CPU won't need to access main memory to search the full page table, and will instead extract the frame number from the TLB. Afterwards, it will make only a single access to memory: to access the physical address.
   • If no, the CPU will make 2 memory accesses: (1) to fetch the frame number from the page table, and (2) to access the memory location at the calculated physical address based on the found frame number.