RISC vs. CISC Architectures

Converting CISC code to RISC code involves breaking down complex instructions into smaller, simpler instructions.

For example, the CISC instruction INC counter, which increments the value at memory location counter (that is: counter++;) could be converted into multiple RISC instructions.

First, use a LOD (load) instruction to move the value into a register: LOD R1, counter. Next, perform the addition by one ADD R1, 1 and store the result of the addition to register R1. Finally, store the result back into memory with a STO (store) instruction: STO counter, R1, where counter is the memory location of the original variable and the place where we'll store the result.

This approach demonstrates how RISC systems emphasize simplicity and modularity while maintaining compatibility with higher-level tasks.

If you get to use a CISC machine, you'll notice a great variation in the kinds of instructions it supports, e.g., addition of two registers (ADD R1, R2) addition of two memory variables (ADD X, Y), addition of a register and variable (ADD X, R1), etc.